Method for fabricating semiconductor device and semiconductor device

ABSTRACT

Part of a first oxide film formed by thermal oxidation is removed by etching. A second oxide film is formed in the part of substrate from which the first oxide film has been removed using heated nitric acid. The two oxide films are nitrided by a nitrogen plasma having a low energy so as to be first and second gate insulating films, i.e., oxynitride films, respectively.

BACKGROUND OF THE INVENTION

The present invention relates to a method for fabricating asemiconductor device and a semiconductor device, and particularlyrelates to a method for fabricating a semiconductor device including anoxide film which is formed by solution oxidation and, furthermore, intowhich nitrogen is introduced and the semiconductor device.

Among a plurality of transistors formed on a semiconductor substrate,for example, a transistor in a CMOS (complementary metal oxidesemiconductor) device has a gate insulating film having a more and morereduced thickness for the purpose of improving the driving ability of asemiconductor device. In recent years, a gate insulating film having athickness of 1-3 nm is required for such a transistor. On the otherhand, in another transistor which is not required to perform a highspeed operation but is required to use a relatively high voltage such asan input/output signal, a gate insulating film has to have a relativelygreat thickness in order to suppress a leakage current in the gateinsulating film. In this case, a desired thickness of the gateinsulating film is 7-10 nm. Since these transistors described above areformed in the semiconductor device, two or more different gateinsulating films having different thicknesses have to be formed on thesame substrate.

Conventionally, thermal oxidation (e.g., see S. M. Sze, VLSI technology,McGraw-Hill, 1984, pp. 131-168) which allows formation of an oxide filmwith excellent properties as a gate insulating film has been mainly usedin oxidizing a semiconductor device to form a gate insulating film. Toform two different gate insulating films having different thicknesses ona semiconductor substrate, a method is used in which after a first gateinsulating film has been formed by thermal oxidation, part of the firstgate insulating film is removed by patterning and then a second gateinsulating film is formed by thermal oxidation in a region of thesemiconductor substrate from which the first gate insulating film hasbeen removed. Moreover, besides thermal oxidation, use of various othermethods for forming a gate insulating film has been examined (e.g., seeJapanese Patent Publication No. 2937817, Japanese Unexamined PatentPublication No. 10-50701, Japanese Unexamined Patent Publication No.10-223629, Japanese Unexamined Patent Publication No. 11-214386, andJapanese Unexamined Patent Publication No. 2002-64093).

As a technique for reducing the thickness of a gate insulating film forthe purpose of improvement of the driving ability of a semiconductordevice, a method in which nitrogen is introduced into a gate insulatingfilm by annealing in nitrogen monoxide so as to reduce an electricalfilm thickness has been used. An electrical film thickness is athickness measured in terms of electrostatic capacity. Even with thesame physical thickness, the larger dielectric constant a film has, thesmaller the thickness of the film is indicated. Oxynitride into whichnitrogen is introduced has a larger dielectric constant than that ofsilicon dioxide. Therefore, by introducing nitrogen, an electrical filmthickness is reduced, so that the driving ability of a transistor isimproved. As a method for introducing nitrogen into a gate insulatingfilm, i.e., a silicon dioxide film, a method using a plasma is known(e.g., Japanese Unexamined Patent Publication No. 10-79509).

Moreover, when nitrogen is introduced into a gate insulating film, asdescribed in Japanese Unexamined Patent No. 10-79509, a dopant withwhich a gate electrode has been doped is prevented from reaching asubstrate through the gate insulating film. This will be describedfurther in detail.

In a CMOS transistor, a dual gate structure in which boron is introducedas a dopant into a gate electrode of a p-channel transistor andphosphorous is introduced as a dopant into a gate electrode of ann-channel transistor is used. Boron has a larger diffusion constant thanthat of phosphorous and thus is diffused in a gate insulating filmthrough thermal treatment performed after the transistor has beenformed. Thus, boron easily reaches a channel region. This phenomenon iscalled boron leakage and causes a large change in a threshold voltage,reduction in the driving ability of a transistor and the like.Especially, the smaller thickness a gate insulating film has, the largerthe boron leakage becomes. However, if nitrogen is introduced into agate insulating film, the boron leakage can be suppressed.

Problems that the Invention is to Solve

In a method for forming a plurality of gate insulating films accordingto the known method, a first gate insulating film is etched throughwafer cleaning performed after a photoresist has been removed, so thatthe thickness of the first gate insulating film is once reduced. Then,when a second gate oxide film is formed, the thickness of the firstinsulating film is increased this time. This causes reduction incontrollability of the thickness of the first gate insulating film, andalso, in terms of film quality, it is very difficult to control the filmquality of the first insulating film which has undergone through etchingand additional oxidation.

Furthermore, assume that three different gate insulating films havingdifferent thicknesses (e.g., 7 nm, 3 nm and 1.5 nm) are formed. A secondgate insulating film has a relatively small thickness, i.e., 3 nm. Thus,the second gate insulating film is more largely influenced by reductionand increase in a filn thickness caused in forming a third gateinsulating film having a thickness of 1.5 nm than a first gateinsulating film having a thickness of 7 nm. That is to say, it is verydifficult to control the thickness of the second gate insulating film sothat the second gate insulating film has a constant thickness at anytime. Accordingly, the ratio of an additional portion formed throughadditional oxidation to the entire thickness of the second gateinsulating film is increased. Therefore, the quality of the entiresecond gate insulating film is largely reduced.

Moreover, assume that the thickness of a gate insulating film isreduced. When an oxynitride film is obtained as a gate insulating filmaccording to a method described in Japanese Unexamined PatentPublication No. 10-79509, the electron energy of a nitrogen plasma isvery high, i.e., about 50-1000 eV and this becomes a problem. Forexample, assume that a gate insulating film into which nitrogen is to beintroduced has a thickness of 1.5 nm. Even when a nitrogen plasma has anenergy of the lower limit of the energy range described in JapaneseUnexamined Patent Publication No. 10-79509, i.e., 50 eV, the nitrogenplasma easily goes thuough the gate insulating film to nitride a siliconsubstrate as well. As a result, even though the thickness of the gateinsulating film was about 1.5 nm before an exposure to the nitrogenplasma, the silicon substrate has been nitrided after the exposure tothe nitrogen plasma, so that the total thickness of part of the gateinsulating film which has been nitrided is over 2 nm. Thus, even thoughan oxide film having a thickness of 1.5 nm is formed, an oxynitride filmhaving a small thickness can not be obtained. As a matter of course, theknown method can not be used with a gate insulating film having athickness of about 1 nm. Furthermore, when a nitrogen plasma has ahigher energy than 50 eV, use of the known method is out of question.Nnitriding of a silicon substrate causes not only increase in a filmthickness but also reduction in a driving force resulting from reductionin mobility or reduction in reliability.

The present invention has been devised in view of the above-describedproblems. It is therefore an object of the present invention is toprovide a method for a fabricating a semiconductor device in which agate insulating film having a small thickness allowing a high-speedoperation can be formed with excellent film thickness control andfurthermore, nitriding can be performed so as not to reach asemiconductor substrate, and a semiconductor device which includes agate insulating film having a small thickness and excellent quality andin which a semiconductor substrate is hardly nitrided.

SUMMARY OF THE INVENTION

A first method for fabricating a semiconductor device according to thepresent invention is a method for fabricating a semiconductor deviceincluding the steps of: forming an oxide film, using a solutionincluding an oxidizer, on a surface of a silicon layer provided at leastin part of a semiconductor substrate; and making the oxide film into anoxynitride film by exposing the oxide film to a plasma having anelectron energy of 5 eV or less and containing nitrogen.

The first method further includes, before the step of forming an oxidefilm, the step of forming an isolation region using STI process.

A second method for fabricating a semiconductor device according to thepresent invention is a method for fabricating a semiconductor deviceincluding the steps of: removing part of a first oxide film formed on asurface of a semiconductor substrate; forming a second oxide film, usinga solution including an oxidizer, in part of the semiconductor substratefrom which the first oxide film has been removed; and making each of thefirst and second oxide films into an oxynitride film by exposing thefirst and second oxide films to a plasma having an electron energy of 5eV and containing nitrogen.

The second method further includes: after the step of forming a secondoxide film, the step of removing part of the second or first oxide film;and the step of forming a third oxide film, using a solution includingan oxidizer, in part of the semiconductor substrate from which the firstor second oxide film has been removed. In the step of making each of thefirst and second oxide films into an oxynitride film, the third oxidefilm is also made into an oxynitride film.

The thickness of the second oxide film is smaller than that of the firstoxide film.

In a preferable embodiment of the present invention, the first oxidefilm is formed by thermal oxidation or plasma oxidation.

In another preferable embodiment of the present invention, the firstoxide film is formed using a perchloric acid solution.

The ion density of the plasma is not less than 5×10⁹ cm⁻³ and not morethan 1×10¹² cm⁻³.

The temperature of the plasma is not less than 0° C. and not more than500° C.

The plasma is selected one from the group consisting of an inductivelycoupled plasma, a magnetron plasma, a helicon wave plasma and a surfacewave plasma.

The oxidizer is nitric acid.

The second method further includes, after the step of making the oxidefilm into an oxynitride film, the step of performing thermal treatmentto the semiconductor substrate in an atmosphere containing oxygen.

In the step of performing thermal treatment, a process temperature isnot less than 800° C. and not more than 1100° C. and a process time isnot less than 10 seconds and not more than 120 seconds.

A first semiconductor device according to the present invention is asemiconductor device including: a semiconductor substrate; a gateinsulating film formed on the semiconductor substrate; and a gateelectrode formed on the gate insulating film. In the first semiconductordevice, the gate insulating film contains silicon dioxide as a maincomponent and nitrogen and has a physical thickness of not less than 0.3nm and not more than 3 nm, the concentration of the nitrogen containedin the gate insulating film is maximum at a distance of 1 nm or less inthe depth direction from a surface of the gate insulating film on whichthe gate electrode is formed, the maximum concentration of the nitrogenis not less than 5 atomic % and not more than 100 atomic %, and thenitrogen concentration at the interface between the semiconductorsubstrate and the gate insulating film is 1.5 atomic % or less.

A second semiconductor device according to the present invention is asemiconductor device including: a semiconductor substrate; a gateinsulating film formed on the semiconductor substrate; and a gateelectrode formed on the gate insulating film. In the secondsemiconductor device, the electrical thickness of the gate insulatingfilm measured by a capacitance-voltage measurement is 0.3 nm or more,the electrical thickness of the gate insulating film is not less than 0%and not more than 90% of the electrical thickness of a silicon dioxidefilm of which the physical thickness is the same as the physicalthickness of the gate insulating film, and a leakage current flowing inthe gate insulating film when a driving voltage of not less than 0.5 Vand not more than 2 V is applied is not less than 1/10000 and not morethan ⅓ of a leakage current flowing in the silicon dioxide film.

The gate insulating film contains silicon dioxide as a main componentand nitrogen.

The electrical thickness of the gate insulating film is not less than0.3 nm and not more than 3 nm.

A third semiconductor device according to the present invention is asemiconductor device including: a semiconductor substrate; a gateinsulating film formed on the semiconductor substrate; and a gateelectrode formed on the gate insulating film. In the third semiconductordevice, the gate insulating film contains silicon dioxide as a maincomponent and nitrogen and has a physical thickness of not less than 0.3nm and not more than 3 nm, and the silicon dioxide is formed using asolution containing an oxidizer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A through 1E are cross-sectional views schematically illustratingrespective process steps according to a first example of the presentinvention.

FIGS. 2A through 2D are cross-sectional views schematically illustratingrespective process steps according to a second example of the presentinvention.

FIGS. 3A through 3D are cross-sectional views schematically illustratingthe first half of respective process steps according to a third exampleof the present invention.

FIGS. 4A through 4C are cross-sectional views schematically illustratingthe latter half of respective process steps according to the thirdexample of the present invention.

FIGS. 5A through 5C are graphs showing distribution of nitrogenconcentration in the film thickness direction for gate insulating filmsformed in the third example.

FIG. 6 is a graph showing the relationship between oxide film equivalentthickness and leakage current.

FIG. 7 is a cross-sectional view illustrating a fourth example of thepresent invention.

FIGS. 8A through 8E are cross-sectional views schematically illustratingrespective process steps according to a comparative example.

FIGS. 9A and 9B are graphs showing distribution of nitrogenconcentration in the film thickness direction for gate insulating filmsformed in the comparative example.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

First, details on how the present inventor examined reduction in thethickness of a gate oxide film (i.e., insulating film) and plasmanitriding and then reached the present invention will be described.

When three different gate oxide films having different thicknesses areformed by thermal oxidation, the thickness of a first gate oxide filnhaving the largest thickness and serving as an input/output system isabout 7 nm. Even after the first gate oxide film has been etched byabout 0.4 nm through wafer cleaning after removal of a photoresist andthen the thickness of the first gate oxide film has been increased by0.2 nm in forming a second gate oxide film, the amount of a change inthe thickness of the first gate oxide film is about 3% of the originalthickness thereof. However, for example, with the second gate oxide filmof a thickness of 2.8 nm and the third gate oxide film of a thickness of1.6 nm, the second gate oxide film has been etched by about 0.4 nmthrough wafer cleaning after the removal of a photoresist and then thethickness of the second gate oxide film has been increased by 0.1 nmthrough oxidation of 1.6 nm in forming a third gate oxide film. As aresult, the thickness of the second gate oxide film, i.e., a thicknessof 2.8 nm, is reduced by about 0.3 nm in total. The reduction amountcorresponds to 20% of the entire thickness of the second gate oxidefilm. Therefore, a very large influence is given to film quality as wellas film thickness control.

Furthermore, a very thin gate insulating film having a thickness of 1.6nm, i.e., a third gate oxide film, a natural oxide film having athickness of about 0.3-1 nm and existing on a surface of an activeregion has to be removed with hydrofluoric acid. Reasons for this are asfollows. First, an oxide film, for example, having a thickness of 1.6 nmis considered to include a layer having only about five to eight atoms.Thus, if a natural oxide film is not removed, it is very difficult tocontrol the thickness of the third oxide film to be constant. Moreover,although the natural film corresponds to several tens % of the thicknessof the third gate oxide film, the natural oxide film does not haveexcellent properties which are required for a gate insulating film. Forthose reasons, the removal of the natural oxide film on the activeregion is necessary.

In this case, if the removal of a natural oxide film is performed usinghydrofluoric acid, the second oxide film is further etched by about 1nm, so that the thickness of the second gate oxide film becomes about1.5 nm i.e., half of the original thickness. To finish a second gateoxide film with a thickness of 2.8 nm as designed, the thickness of thesecond gate oxide film has to be made to initially have a thickness of4.0 nm in consideration of the etching amounts described above.

Moreover, in high temperature treatment such as thermal oxidation, it isvery difficult to form a third oxide film having a very small thickness,i.e., a thickness of 1.6 nm, with excellent controllability anduniformity. Therefore, apart from laboratory experiments, inmanufacturing processes, it is considered very difficult to form, inorder to further reduce the thickness of the third oxide film, a gateoxide film having a thickness of 1 nm or less by thermal oxidationaccording to the known method.

Thus, it has been clearly shown that the known method has a problem inwhich the thickness of an already formed gate oxide film is reducedthrough wafer cleaning performed before forming another gate oxide film,a problem in which the thickness of the already formed gate oxide filmis increased due to additional thermal oxidation, and furthermore, aproblem in which it is difficult to control the thickness and quality ofa film in forming a very thin gate oxide film having a thickness of 1.5nm or less.

Next, as a comparative example, an examination of the process step offorming a gate oxide film by thermal oxidation and then performingnitriding using a plasma will be described with reference to theaccompanying drawings.

FIGS. 8A through 8E are cross-sectional views illustrating respectiveprocess steps for forming a dual oxide (two different gate insulatingfilms having different thicknesses) according to a comparative example.

First, FIG. 8A illustrates how a first gate oxide film 73 serving as ahigh voltage system is formed on a silicon substrate 71 in which anisolation region 72 is formed using STI (shallow trench isolation)process by thermal oxidation. The first gate oxide film 73 is formed soas to have a thickness of 7 nm.

Next, as shown in FIG. 8B, part of the first gate oxide film 73 on asecond gate insulating film formation region 74 (i.e., a first oxidefilm removal region) of the silicon substrate is removed with ahydrofluoric acid or the like. In removing the part of the first gateoxide film 73, a photoresist 75 is used as a mask. Thereafter, through awet cleaning process for removing the photoresist 75 and a wet cleaningprocess performed before forming a second gate oxide film 76, thethickness of the gate oxide film 73 is reduced by about 0.4 nm from theoriginal thickness of 7 nm.

Thereafter, as shown in FIG. 8C, a second gate oxide film 76 serving asa low voltage system and having a thickness of 2.2 nm is formed bythermal oxidation. At this time, the thickness of the first gate oxidefilm is increased by about 0.2 nm to be about 6.8 nm.

Then, as shown in FIG. 8D, the first and second gate oxide films 73 and76 are exposed to a nitrogen plasma 78 having an electron energy ofabout 50-1000 eV so that nitrogen is introduced into the first andsecond gate oxide films 73 and 76. Thus, the first and second gate oxidefilms 73 and 76 are made into first and second gate insulating films 81and 82, respectively.

Thereafter, as shown in FIG. 8E, first and second gate electrodes 91 and92 are formed on the first and second gate insulating films 81 and 82,respectively. Then, through the process steps of forming an LDD (lightlydoped drain), a sidewall 85, and source and drain, a semiconductordevice 500 including a plurality of transistors (two transistors in thisembodiment) is formed.

In FIG. 9, the SIMS (secondary-ion mass spectrometry) profiles of thenitride concentrations of the first and second gate insulating films 81and 82 formed in the above-described manner are shown under theassumption that the power and time of the plasma 78 are adjusted so thata peak concentration is 5 atomic %. The electron energy of the plasma 78is about 10 eV at this time, i.e., one fifth of the lower limit electronenergy of the plasma described in Japanese Unexamined Patent PublicationNo. 10-79509.

As shown in FIG. 9A, the nitrogen concentration distribution of thefirst gate insulating film 81 (having a thickness of 7 nm) has a peak ata distance of about 2 nm from a surface of the first gate insulatingfilm 81 (i.e. the interface with the gate electrode 91) and the nitrogenconcentration is almost 0 around 4 nm. Therefore, in the case of thefirst gate insulating film 81 having a thickness of 7 nm, even if theknown technology is used, the nitrogen concentration around theinterface between the first gate insulating film 81 and the siliconsubstrate 71 is almost 0. Therefore, the silicon substrate 71 is no waynitrided.

However, as shown in FIG. 9B, the nitrogen concentration distribution ofthe second gate insulating film 82 (having a very small thickness, i.e.,2.2 nm) has a peak at a depth of 2 nm from the interface with the gateelectrode 92. This peak position substantially corresponds to theinterface between the second gate insulating film 82 and the siliconsubstrate 71 and shows that a tail of nitrogen extends in the siliconsubstrate 71. This is because the energy of the nitrogen plasma 78 isnot as low as that required for the thickness of the second gateinsulating film 82, so that the nitrogen plasma 78 goes through thesecond gate insulating film 82 to nitride the silicon substrate 71. Inthis state, the electrical thickness of the second gate insulating film82 measured by a high-frequency CV measurement (a capacitance-voltagemeasurement) includes a serial capacitance formed by nitriding thesilicon substrate 71 and is greater than the electrical thickness of thesecond gate insulating film 82 which does not includes a serialcapacitance. Thus, effects of reduction in and nitriding of thethickness of the gate oxide film 76 can not be utilized.

Then, the present inventor conducted various examinations based on theabove-described findings. As a result, the present inventor has reachedthe present invention relating to a gate insulating film with excellentfilm controllability, uniformity of film thickness and film quality.

Hereinafter, embodiments of the present invention will be described.Note that the present invention is not limited to the followingenbodiments.

(Embodiment 1)

EMBODIMENT 1 relates to a semiconductor device including two differentgate insulating films having different thicknesses.

First, a substrate including a silicon layer at least on a surfacethereof is prepared. The substrate may be a silicon substrate or an SOIsubstrate. Moreover, if an epitaxial wafer in which a surface layer of asilicon layer is an epitaxial layer is used, no deficiency is generatedin the surface layer. Accordingly, a gate insulating film with excellentfilm quality can be preferably formed.

Next, an isolation region is formed in the substrate using STI process.

Thereafter, a first oxide film for dealing with a relatively highvoltage signal such as an input/output signal is formed on the surfaceof the substrate by thermal oxidation. The thickness of the oxide filmis about 7-10 nm. Note that a method for forming a first oxide film isnot limited to thermal oxidation but may be plasma oxidation, oxidationusing perchloric acid solution or the like. With these oxidationmethods, a relatively thick oxide film can be formed in a short time andthe film quality of an obtained oxide film is good. Therefore, thesemethods are preferable as methods for forming a first oxide film.

Thereafter, a phlotoresist is provided as a mask on part of the firstoxide film which is to be left as a first gate insulating film and thenother part of the first oxide film is removed by etching.

After the photoresist has been removed, the substrate is immersed inheated nitric acid serving as an oxidizer and then a second oxide filmis formed by solution oxidation in part of the substrate from which thefirst oxide film has been removed. Here, instead of immersing thesubstrate in heated nitric acid, heated nitric acid may be sprayed tothe substrate or be made to flow on the substrate. The thickness of thesecond oxide film is about 0.3-2 nm. Note that through the solutionoxidation, the thickness of the first oxide film is hardly increased. Inthis oxidation process, as an oxidizer, heated nitric acid is preferablyused. However, perchloric acid may be used.

Next, the substrate in which the two oxide films have been formed isplaced at room temperature (i.e., about 20° C.) and then the substrateis exposed to a plasma containing nitrogen having an electron energy of5 eV or less to nitride the substrate. In this plasma nitriding, thelower limit of the energy of the plasma is a level at which a plasmastate can be maintained. As the plasma, an inductively coupled plasma, amagnetron plasma, a helicon wave plasma or a surface wave plasma ispreferable. If the electron energy of the plasma is not less than 0.5 eVand not more than 3 eV, introduction of nitrogen further to thesubstrate under the second oxide film can be reliably avoided.Therefore, the electron energy of not less than 0.5 eV and not more than3 eV is more preferable. The density of nitrogen ions in the plasma ispreferably not less than 5×10⁹ cm⁻³ and not more than 1×10¹² cm⁻³.

Thereafter, the nitrided substrate is subjected to thermal treatment for10-120 seconds in an oxygen atmosphere in which a temperature is set tobe not less than 800° C. and not more than 1100° C. The thermaltreatment is performed so that Si reliably binds to N. Note that in thisthermal treatment, the atmosphere may be a low pressure oxygenatmosphere. Moreover, although effects are slightly reduced, the thermaltreatment may be performed using a non-oxidizing gas such as nitrogenand argon.

Next, a polysilicon film has been deposited on the substrate and then animpurity introduction and patterning are performed to form gateelectrodes.

According to this embodiment, a second oxide film, i.e., a very thinoxide film, can be formed so as to have excellent reproducibility anduniformity of film thickness, and even an oxide film having a thicknessof 1.6 nm or less, which is difficult to be formed by thermal oxidation,can be formed in a simple manner. Moreover, an oxide film fomned bysolution oxidation has excellent film quality and also nitriding isperfonred using a low-energy high-density nitrogen plasma, so that theelectrical thickness of the oxide film measured by a capacitance-voltagemeasurement can be reduced. Therefore, a leakage current can besuppressed to a low level. Note that although the electrical thicknessof a silicon dioxide film is in general a thickness obtained by adding0.2-0.3 nm to the physical thickness of the silicon dioxide film, theelectrical thickness of the nitrided oxide film of this embodiment issubstantially the same as or slightly larger than the physical thicknessof the nitrided oxide film.

Moreover, the gate insulating film of this embodiment contains silicondioxide as a main component and nitrogen. To contain silicon dioxide asa main component and nitrogen means that the mole percent of nitrogen tosilicon contained in silicon dioxide is not less than 1% and not morethan 50%. Therefore, it has been shown that the gate insulating film isnot a silicon nitride film.

The isolation region of this embodiment is formed using STI process. STIprocess is a method of burying an insulator into a silicon layer. In ahigh temperature process such as thermal oxidation, an oxidizer evenoxidizes an inner wall of the isolation region. Due to the oxidation ofthe inner wall of the isolation region, cubical expansion occurs in theisolation region, so that a stress is generated. Then, if in order torelax the stress, a temperature is increased to make a viscous flow, animpurity is diffused this time. This is also not preferable. In thisembodiment, however, the second oxide film is formed by solutionoxidation at a relatively low temperature. Thus, the oxidizer is notdiffused in the isolation region and the inner wall of the isolationregion is not oxidized, so that no stress is generated. Therefore, thereis no need to perform stress relaxation.

Moreover, in this embodiment, the semiconductor substrate may be asubstrate containing Si at least on the surface thereof. For example, aSiGe substrate may be used.

(Embodiment 2)

EMBODIMENT 2 is different from EMBODIMENT 1 in that three differentoxide films having different thicknesses are formed. EMBODIMENT 2 willbe described with a focus on this different point of EMBODIMENT 2 fromEMBODIMENT 1.

First and second oxide films are formed in a substrate as in the samemanner as in EMBODIMENT 1.

Next, a photoresist is provided as a mask so as to cover parts of thefirst and second oxide films which are to be left as first and secondgate insulating films, respectively, and then other parts of the firstoxide film and/or the second oxide film are removed by etching.

After the photoresist has been removed, the substrate is immersed inheated nitric acid serving as an oxidizer and then a third oxide film isformed in parts of the substrate from which the first oxide film and/orthe second oxide film have been removed by solution oxidation. Thethickness of the third oxide film is preferably smaller than that of thesecond oxide film, i.e., about 0.3-3 nm.

Thereafter, nitriding and gate electrode formation are performed in thesame manner as in EMBODIMENT 1.

In this embodiment, the second and third oxide films can be formed so asto have excellent reproducibility and uniformity of film thickness, andeven an oxide film having a thickness of 1.6 nm or less, which isdifficult to be formed by thermal oxidation, can be formed in a simplemanner. Specifically, when the third oxide film is formed, the secondoxide film is only etched and the thickness of the second film is notincreased. Thus, the thickness of the second oxide film can becontrolled in a simple manner, and also the quality of the second oxidefilm can be kept good. Moreover, an oxide film formed by solutionoxidation has excellent film quality and also nitriding is performedusing a low-energy high-density nitrogen plasma, so that the electricalthickness of the oxide film measured by a capacitance-voltagemeasurement can be reduced. Therefore, a leakage current can besuppressed to a low level.

EXAMPLES

Hereinafter, examples according to the present invention will bedescribed with reference to the accompanying drawings. In the followingdrawings, each component having substantially the same function isidentified by the same reference numeral for the purpose ofsimplification.

(First Example)

A first example of the present invention which relates to asemiconductor device 100 including two different gate insulating films11 and 12 having different thicknesses will be described with referenceto cross-sectional views shown in FIG. 1 and schematically illustratingrespective process steps for fabricating a semiconductor device.

First, as shown in FIG. 1A, in an epitaxial wafer (a semiconductorsubstrate) 1 in which an epitaxial layer having a resistivity of 10-15Ωcm and a thickness of 5 μm was formed on a silicon substrate of whichthe principal surface was the (100) plane and which has a p-typeresistivity of 0.01-0.02 Ωcm, isolation regions 2 having a depth of 250nm were formed using STI (shallow trench isolation) process, so that anisolation width between adjacent two of the isolation regions 2 was 200nm. Furthennore, well formation and introduction of an impurity into anactive region by ion implantation for adjusting a threshold voltage wereperformed. This semiconductor substrate 1 was cleaned using an SC-1cleaning liquid (NH₄OH: H₂O₂: H₂O) of a temperature of 50° C. and then anatural oxide film was removed from the surface of the substrate usingdiluted hydrofluoric acid. Thereafter, in an RTP apparatus, thermaloxidation was performed at a temperature of 1050° C. and in an H₂/O₂mixed atmosphere to form a first gate oxide film (a first oxide film) 3having a thickness of 7.2 nm. Note that the cleaning method using anSC-1 cleaning liquid is a known cleaning method called “RCA cleaning”(W. Kern and D. A. Plutien, RCA review 31, p. 187, 1970).

In this case, the first oxide film 3 was grown to extend in each ofregions into which the substrate was divided by the isolation regions 2,i.e., a region of the substrate in which a first gate insulating film 11was to be formed and a region of the substrate in which a second gateinsulating film 12 was to be formed. Thereafter, as shown in FIG. 1B, aphotoresist 5 was formed as a mask on the region in which a first gateinsulating film 11 was to be formed, and then etching using dilutedhydrofluoric acid was performed to remove part of the first oxide filn 3located on the region in which a second gate insulating film 12 was tobe formed.

Next, as shown in FIG. 1C, after the photoresist 5 was removed using a130° C. mixed solution of sulfuric acid and hydrogen peroxide solution,the substrate was immersed in 50% heated nitric acid 7 of a temperatureof 80° C. for 30 minutes and then an SiO₂ film, i.e., a second gateoxide film (a second oxide film) 6 having a thickness of 1.4 nm, wasformed in a region 4 of the substrate from which the first oxide film 3had been removed. The film thickness uniformity of the second oxide film6 measured by ellipsometry was 0.01 nm (σ) in a 200 mm wafer surface. Atthis time, on the other hand, the average thickness of the first oxidefilm 3 was 7 nm.

Thereafter, as shown in FIG. 1D, the first and second oxide films 3 and6 were exposed for 20 seconds to a nitrogen plasma 8 generated by aninductively coupled plasma (at 12.56 MHz and of 500 W) at roomtemperature (i.e., 30° C.) and having an electron energy of 1.0 eV. Thetemperature then was room temperature (30° C.) and the ion density ofthe nitrogen plasma 8 was 5×10¹⁰ cm⁻³. Note that in this exposure,helium was used as an addition gas. Through the exposure to the nitrogenplasma 8, the first and second oxide films 3 and 6 were made intooxynitride films 11 and 12, i.e., first and second gate insulatingfilms.

Subsequently, thermal treatment was performed for 20 seconds at atemperature of 1000° C. and in an oxygen atmosphere of 5 Torr.

Next, as shown in FIG. 1E, a polycrystalline silicon film was depositedto a thickness of 150 nm at 620° C., an N-channel gate and a P-channelgate were doped with phosphorous and boron, respectively, and thenpatterning using a photolithography and dry-etching were performed in aknown manner. Thus, gate electrodes 21 and 22 were formed.

Thereafter, ion implantation into an LDD region was performed and,furthermore, low pressure CVD using TEOS (tetra ethyl ortho silicate) ata temperature of 650° C. and etch back were performed, thereby forming asidewall 15. Then, arsenic ions and boron ions were implanted into theN-channel and the P-channel, respectively, thereby forming source/drainregions. Thereafter, regular process steps of forming an interlevel filmand an interconnect were performed.

When the respective electrical thicknesses of the first and second gateinsulating films 11 and 12 formed in the above-described manner weremeasured by a high-frequency CV measurement (a capacitance-voltagemeasurement), the first gate insulating film had a 7.2 nm electricalthickness and the second gate insulating film had a 1.4 nm electricalthickness. Note that the measurement was conducted with the silicondioxide having a dielectric constant of 3.9. The physical thicknesses ofthe first gate insulating film 11 and the second gate insulating film 12were 7.0 nm and 1.4 nm, respectively. Note that when a high-frequency CVmeasurement was conducted for a silicon dioxide film having a physicalthickness of 1.4 nm, the electrical thickness thereof was 1.6 nm.Moreover, the respective nitrogen profiles of the first and second gateinsulating films 11 and 12 in the depth direction were measured by SIMS.From the measurement, a nitrogen concentration distribution having apeak of 10 atomic % at a distance of 0.5 nm from each of surfaces of thefirst and second gate insulating films 11 and 12 on which the gateelectrodes 21 and 22 were formed, respectively was confirmed. Moreover,the nitrogen concentration of an interface portion between the firstgate insulating film 11 and the semiconductor substrate 1 was 0.01atomic % or less and the nitrogen concentration of an interface portionbetween the second gate insulating film 12 and the semiconductorsubstrate was 1.0 atomic % or less. The semiconductor substrate in eachof the interface portions was hardly nitrided.

(Second Example)

A second example of the present invention which relates to asemiconductor device 200 including a gate insulating film 32 will bedescribed with reference to cross-sectional views shown in FIG. 2 andschematically illustrating respective process steps for fabricating asemiconductor device.

First, as shown in FIG. 2A, in an epitaxial wafer (a semiconductorsubstrate) 1 in which an epitaxial layer having a resistivity of 10-15Ωcm and a thickness of 5 μm was formed on a silicon substrate of whichthe principal surface was the (100) plane and which has a p-typeresistivity of 0.01-0.02 Ωcm, isolation regions 2 having a depth of 250nm were formed using STI (shallow trench isolation) process, so that anisolation width between adjacent two of the isolation regions 2 was 200nm. Furthermore, well formation and introduction of an impurity into anactive region by ion implantation for adjusting a threshold voltage wereperformed.

Thereafter, as shown in FIG. 2B, the semiconductor substrate 1 wascleaned using an SC-1 cleaning liquid (NH₄OH: H₂O₂: H₂O) of atemperature of 50° C. and then a natural oxide film was removed from thesurface of the substrate using diluted hydrofluoric acid. Then, thesubstrate was immersed in 50% heated nitric acid 7 of a temperature of80° C. for 10 minutes to deposit an SiO₂ film, i.e., a gate oxide film31 having a thickness of 1.1 nm. The thickness of the gate oxide film 31was measured by spectroscopic ellipsometry. At this time, the filmthickness distribution in the wafer surface was 0.01 nm (σ).

Thereafter, as shown in FIG. 2C, the gate oxide film 31 was exposed for15 seconds to a nitrogen plasma 18 generated by an inductively coupledplasma at 13.56 MHz and of 300 W so that the gate oxide film 31 was madeinto an oxynitride film 32. The temperature then was room temperature(30° C.) and the ion density of the nitrogen plasma 18 was 3×10¹⁰ cm⁻³.Note that in this exposure, the plasma was generated using only nitrogenwithout any addition gas. The electron energy was estimated to be 1 eVor less.

Thereafter, as shown in FIG. 2D, a polycrystalline silicon film wasdeposited to a thickness of 150 nm at a temperature of 620° C., anN-channel gate or a P-channel gate was doped with phosphorous or boron,and then patterning using a photolithography and dry-etching wereperformed in a known manner. Thus, a gate electrode 24 was formed.

Then, ion implantation into LDD regions 27 was performed and,furthermore, low pressure CVD using TEOS (tetra ethyl ortho silicate) ata temperature of 650° C. and etch back were performed, thereby forming asidewall 15. Then, arsenic ions and boron ions were implanted into theN-channel and the P-channel, respectively, thereby forming source/drainregions 26. Thereafter, regular process steps of forming an interlevelfilm and an interconnect were performed.

When the electrical thickness of the gate insulating film 32 formed inthe above-described manner was measured by a high-frequency CVmeasurement (a capacitance-voltage measurement), the electricalthickness thereof was 1.1 nm. The physical thickness of the gateinsulating film 32 was 1.1 nm. Note that when a high-frequency CVmeasurement was conducted for a silicon dioxide film having a physicalthickness of 1.1 nm, the electrical thickness thereof was 1.3 nm.Moreover, the nitrogen profile of the gate insulating film 32 in thedepth direction was measured by SIMS. From the measurement, a nitrogenconcentration distribution having a peak of 8 atomic % at a distance of0.5 nm from surfaces of the gate insulating film 32 on which the gateelectrode 24 was formed was confirmed. Moreover, the nitrogenconcentration of an interface portion between the gate insulating film32 and the semiconductor substrate 1 was 1.0 atomic %. This showed thatthe semiconductor substrate 1 was hardly nitrided.

(Third Example)

A third example of the present invention which relates to asemiconductor device 300 including three different gate insulating films11, 12 and 13 having different thicknesses will be described withreference to cross-sectional views shown in FIGS. 3 and 4 andschematically illustrating respective process steps for fabricating asemiconductor device.

First, as shown in FIG. 3A, in an epitaxial wafer (a semiconductorsubstrate) 1 in which an epitaxial layer having a resistivity of 10-15Ωcm and a thickness of 5 μm was formed on a silicon substrate of whichthe principal surface was the (100) plane and which a p-type resistivityof 0.01-0.02 Ωcm, isolation regions 2 having a depth of 250 nm wereformed using STI (shallow trench isolation) process, so that anisolation width between adjacent two of the isolation regions 2 was 200nm. Furthennore, well formation and introduction of an impurity into anactive region by ion implantation for adjusting a threshold voltage wereperformed. This semiconductor substrate 1 was cleaned using an SC-1cleaning liquid (NH₄OH: H₂O₂: H₂O) of a temperature of 50° C. and then anatural oxide film was removed from the surface of the substrate usingdiluted hydrofluoric acid. Thereafter, in an RTP apparatus, thermaloxidation was performed at a temperature of 1050° C. and in an H₂/O₂mixed atmosphere to form a first gate oxide film (a first oxide film) 3having a thickness of 5.5 nm.

In this case, the first oxide film 3 was grown to extend in all ofregions into which the substrate was divided by the isolation regions 2,i.e., a region of the substrate in which a first gate insulating film 11was to be formed, a region of the substrate in which a second gateinsulating film 12 was to be formed, and a region of the substrate inwhich a third gate insulating film 13 was to be formed. Thereafter, asshown in FIG. 3B, a photoresist 5 was formed as a mask on the region inwhich a first gate insulating film 11 was to be formed, and then etchingusing diluted hydrofluoric acid was performed to remove parts of thefirst oxide film 3 located on the region in which a second gateinsulating film 12 was to be formed and the region in which a third gateinsulating film 13 was to be formed.

Next, as shown in FIG. 3C, after the photoresist 5 was removed using a130° C. mixed solution of sulfuric acid and hydrogen peroxide solution,the semiconductor substrate 1 was immersed in 50% heated nitric acid 7of a temperature of 80° C. for 60 minutes and then an SiO₂ film, i.e., asecond gate oxide film (a second oxide film) 6 having a thiclkess of 2nm, was formed in a region 4 of the substrate from which the first oxidefilm 3 had been removed.

Thereafter, as shown in FIG. 3D, a photoresist 25 was formed as a maskover the regions in which a first gate insulating film 11 was to beformed and in which a second gate insulating film 12 was to be formed,and then etching using diluted hydrofluoric acid was performed to removepart of the second oxide film 6 located on the region in which a thirdgate insulating film 13 was to be formed.

Next, as shown in FIG. 4A, after the photoresist 25 was removed using a130° C. mixed solution of sulfuric acid and hydrogen peroxide solution,the substrate was immersed in 50% heated nitric acid 7 of a temperatureof 80° C. for 10 minutes and then an SiO₂ film, i.e., a third gate oxidefilm (a third oxide film) 9 having a thickness of 1.1 nm, was formed ina portion 14 of the substrate from which the second oxide film 6 hadbeen removed. In this case, the average thicknesses of the first oxidefilm 3 and the second oxide film 6 were still 5.5 nm and 2 nm,respectively.

Each of the film thickness uniformities of the second oxide film 6 andthe third oxide film 9 measured by ellipsometry was 0.01 nm (σ) in a 200nm wafer surface.

In this process step, three different gate oxide films, i.e., the firstoxide film 3 having a thickness of 5.5 nm, the second oxide film 6having a thickness of 2 nm and the third oxide film 9 having a thicknessof 1.1 nm were formed.

Subsequently, as shown in FIG. 4B, the substrate 1 in which the oxidefilms 3, 6 and 9 were formed was exposed for 10 seconds to a nitrogenplasma 28 of 1500 W and at a temperature of 400° C., i.e., a microwaveexcitation surface wave plasma. In this case, argon was used as anaddition gas. The estimated electron energy then was about 1 eV and theion density of the nitrogen plasma 28 was 7×10¹⁰ cm⁻.

Subsequently, thermal treatment was performed for 20 seconds at atemperature of 1000° C. and in an oxygen atmosphere of 5 Torr.

Next, as shown in FIG. 4C, a polycrystalline silicon film was depositedto a thickness of 150 nm at 620° C., an N-channel gate and a P-channelgate were doped with phosphorous and boron, respectively, and thenpatterning using a photolithography and dry-etching were performed in aknown manner. Thus, gate electrodes 21, 22 and 23 were formed.

Thereafter, ions were implanted into an LDD region and, furthermore, lowpressure CVD using TEOS (tetra ethyl ortho silicate) at a temperature of650° C. and etch back were performed, thereby forming a sidewall 15.Then, arsenic ions and boron ions were implanted into the N-channel andthe P-channel, respectively, thereby forming source/drain regions.Thereafter, regular process steps of forming an interlevel film and aninterconnect were perfonned.

When the respective electrical thicknesses of the first, second andthird gate insulating films 11, 12 and 13 formed in the above-describedmanner were measured by a high-frequency CV measurement (acapacitance-voltage measurement), the electrical thickness of the firstgate insulating film 11 was 5.7 nm, the electrical thickness of thesecond gate insulating film 12 was 1.9 nm and the electrical thicknessof the third gate insulating film 13 was a 1.0 nm. The physicalthicknesses of the first gate insulating film 11, the second gateinsulating film 12 and the third gate insulating film 13 were 5.5 nm,2.0 nm and 1.1 nm, respectively. Note that when a high-frequency CVmeasurement was conducted for a silicon dioxide film having a physicalthickness of 2.0 nm, the electrical thickness thereof was 2.2 nm. Theelectrical thickness of a silicon dioxide film having a physicalthickness of 1.1 nm was 1.3 nm.

FIG. 5 shows SIMS distribution of nitrogen concentration in the filmthickness direction for the three different gate insulating films 11, 12and 13 of the semiconductor device of the present invention. In the SIMSdistribution of each of the gate insulating films 11, 12 and 13, a peakposition of the nitrogen concentration was located at a distance ofabout 0.5 nm from the surface of a film (the interface with a gateelectrode) as in the first example, and the peak concentration was 12atomic %. The three different gate insulating films had about the samenitrogen concentration profile. For the third gate insulating film 13having the smallest thickness, i.e., a thickness of 1.1 nm, the nitrogenconcentration at the interface between the gate insulating film 13 andthe semiconductor substrate 1 was 1 atomic % or less. Also, almost nonitriding in the substrate 1 was observed. From the results describedabove, for the electrical thickness measured by a high-frequency CVmeasurement, a very small value, i.e., 1.0 nm was obtained. As for aleakage current in the third gate insulating film 13, a reduction by twoorders in magnitude (about 1/100), compared to a thermal oxide filmhaving the same physical thickness as that of the third gate insulatingfilm 13 was observed. Therefore, it has been confirmed that base oxidefilm formation and subsequent nitriding using a high density nitrogenplasma having a low energy were very effective in reduction for aleakage current in a very thin gate insulating film and reduction in anelectrical thickness.

Next, the leakage current will be described.

FIG. 6 is a graph of leakage currents in a silicon oxide film formed bythermal oxidation and an oxynitride film (gate insulating film) formedin a method according to the present invention and having a thickness of0.8-1.8 nm in terms of oxide film equivalent thickness when drivingvoltage is 2V. The oxide film equivalent thickness of a film isindicated by a physical thickness of a silicon dioxide film having thesame electrical thickness as that of the film.

In general, reduction in the thickness of a gate oxide film causesincrease in a leakage current flowing in the gate oxide film. Althoughthe conduction mechanism of a silicon dioxide film normally is due to aFowler-Nordheim tunnel current, in a region of a film having a thicknessof 3.5 nm or less, a direct tunnel current is dominant. Accordingly, asthe thickness of the film is reduced by 0.2 nm, a leakage current isincreased by one order in magnitude. Therefore, in a filn having athickness of 2.6 nm or less, a gate leakage current flowing in a gateinsulating film among leakage currents in a transistor can not bedisregarded. In a known gate insulating film, reduction in such aleakage current is one of big challenges. However, it has been confirmedthat a leakage current in an oxynitride film formed according to thepresent invention is smaller by about 1.5-2 orders in magnitude thanthat in a silicon oxide film formed by thermal oxidation. Within a rangeshown in FIG. 6, a leakage current in the oxynitride film of the presentinvention is about 1/20- 1/100 of a leakage current in a thermal oxidefilm having the same physical thickness as that of the oxynitride film.This shows excellent film quality of a chemical oxide film formed usingheated nitric acid and effectiveness of oxynitride film formation byexposure to a nitrogen plasma having a low energy.

(Fourth Example)

A fourth example of the present invention will be described withreference to FIG.

FIG. 7 illustrates a schematic view of a semiconductor device 400 havinga MIS structure as an exemplary field effect transistor or capacitorhaving a metal-insulating film-semiconductor structure. In FIG. 7,source and drain, an LDD, a well, an isolation and the like which wereactually provided in the semiconductor device and do not directly relateto the present invention are omitted. On a semiconductor substrate 1made of silicon, provided was an oxide film formed by immersing thesubstrate in 50% heated nitric acid of a temperature of 80° C. andhaving a thickness of 1.5 nm. The oxide film was exposed to a nitrogenplasma generated from a mixture of nitrogen gas and helium gas by aninductively coupled plasma and having an ion density of 2×10¹⁰ cm³¹ ³,thereby introducing nitrogen atoms into the oxide film. Thus, the oxidefilm was made into a gate insulating film 51. At this time, anadjustment was made so that a peak of nitrogen D is located at adistance of 0.5 nm from a surface of the gate insulating film 51. Thenitrogen concentration at the peak P was 16 atomic %. Moreover, thenitrogen concentration at the interface S between the gate insulatingfilm 51 and the semiconductor substrate 1 was 0.9 atomic %.

Thereafter, as a gate electrode 52, a polycrystalline silicon film dopedwith boron as an impurity was deposited.

Thus, for the nitrogen concentration profile in the gate insulating film51, a part of the gate insulating film 51 located closer to theelectrode is made to have a high concentration and the nitrogenconcentration at the interface S between the silicon substrate 1 and thegate insulating film 51 is made to be about 1 atomic %, so thatdiffusion of boron in the polycrystalline silicon film, i.e., theelectrode 52 can be suppressed by nitrogen contained in the part of thegate insulating film 51 at a high concentration. Accordingly, boron isdiffused in the gate insulating film 51 and then in silicon of thesubstrate 1 directly under the gate insulating film 51, therebypreventing reduction in mobility and change in a threshold voltage.Moreover, due to nitrogen contained in the part of the gate insulatingfilm 51 at a high concentration, the gate insulating film 51 exhibits ahigher dielectric constant than the dielectric constant unique to asilicon dioxide film, i.e., 3.9. As a result, with an equivalentphysical thickness to that of a silicon dioxide film, a higher staticcapacitance can be obtained. In other words, a smaller electricalthickness than that of a silicon dioxide film can be obtained, thusimproving the driving ability of a transistor.

Moreover, when high concentration nitrogen exists at the interfacebetween the gate insulating film 51 and the silicon substrate 1, changein the mobility and threshold voltage of the transistor are caused dueto diffusion of an impurity, the generation of an interface level, thegeneration of fixed charge resulting from the existence of highconcentration nitrogen. However, when the nitrogen concentration at theinterface is about 1 atomic %, as in this sample, deterioration ofinterface properties caused by dangling or broken bonds due to adisturbance of binding at the interface can be suppressed. This isbecause nitrogen exists at the interface at an amount enough toterminate a binding end of a dangling or broken bond. If an excessiveamount of nitrogen exists, not only a binding end of a dangling orbroken bond is terminated but also a normal binding is replaced withnitrogen, thus resulting in adverse side effects. Moreover, due tonitrogen contained in the gate insulating film at a high concentration,a leakage current is also reduced. Accordingly, with the gate insulatingfilm of this example, a low leakage current and a high dielectricconstant which can not be obtained in a known silicon dioxide film canbe obtained. Therefore, the performance of the transistor can be farimproved.

As has been described, an oxide film is formed using heated nitric acidserving as an oxidizer and then the oxide film is exposed to a plasmahaving an electron energy of 5 eV and containing nitrogen, so that agate insulating film, i.e., an oxynitride film is formed. Using the gateinsulating film, a semiconductor device is formed. Therefore, for thegate insulating film of the semiconductor device, uniformity of a filmthickness can be achieved and the same thickness can be obtained asexcellent reproducibility. Also, at the same time, the gate insulatingfilm has an excellent film quality and a small electrical thickness, sothat a leakage current can be reduced.

1-19. (canceled)
 20. A semiconductor device comprising: a semiconductorsubstrate; a gate insulating film formed on the semiconductor substrate;and a gate electrode formed on the gate insulating film, wherein thegate insulating film contains silicon dioxide as a main component andnitrogen and has a physical thickness of not less than 0.3 nm and notmore than 3 nm, wherein the concentration of the nitrogen contained inthe gate insulating film is maximum at a distance of 1 nm or less in thedepth direction from a surface of the gate insulating film on which thegate electrode is formed, wherein the maximum concentration of thenitrogen is not less than 5 atomic % and not more than 100 atomic %, andwherein the nitrogen concentration at the interface between thesemiconductor substrate and the gate insulating film is 1.5 atomic % orless.
 21. A semiconductor device comprising: a semiconductor substrate;a gate insulating film formed on the semiconductor substrate; and a gateelectrode formed on the gate insulating film, wherein the electricalthickness of the gate insulating film measured by a capacitance-voltagemeasurement is 0.3 nm or more, where the electrical thickness of thegate insulating film is not less than 0% and not more than 90% of theelectrical thickness of a silicon dioxide film of which the physicalthickness is the same as the physical thickness of the gate insulatingfilm, and wherein a leakage current flowing in the gate insulating filmwhen a driving voltage of not less than 0.5 V and not more than 2 V isapplied is not less than 1/10000 and not more than ⅓ of a leakagecurrent flowing in the silicon dioxide film.
 22. The semiconductordevice of claim 21, wherein the gate insulating film contains silicondioxide as a main component and nitrogen.
 23. A semiconductor devicecomprising: a semiconductor substrate; a gate insulating film formed onthe semiconductor substrate; and a gate electrode formed on the gateinsulating film, wherein the gate insulating film contains silicondioxide as a main component and nitrogen and has a physical thickness ofnot less than 0.3 nm and not more than 3 nm, and wherein the silicondioxide is formed using a solution containing an oxidizer.